The RT9829 has two combined delayed reset inputs (SR0, SR1) with a user selectable delayed setup time (t_SRC) option of either 7.5s or 12.5s (typ.), selectable via the dual-state DSR input pin. When DSR is connected to ground, t_SRC = 7.5s (typ.); when connected to V_CC, t_SRC = 12.5s (typ.). There are two reset outputs which become active simultaneously after both of the reset inputs are held active for the selected t_SRC delay time. The outputs remain asserted until either or both inputs go to inactive logic level (for this device the output reset pulse duration is fully push-button controlled, meaning neither fixed nor minimum reset pulse width, nor power on reset pulse is implemented). The first reset output, RST1, is active low, open drain; the second reset output, RST2, is active high, push-pull. The device fully operates over a broad V_CC range from 1.65V to 5.5V. Below 1.575V (typ.), the inputs are ignored and the outputs are de-asserted. The de-asserted reset output levels are then valid down to 1V.

The RT9829 is available in a tiny WDFN-8L 2x2 (COL) package.